This invention relates to a process for manufacturing a multilayer structure made from semiconducting materials and comprising an active layer, a support layer and an electrically insulating layer between the active layer and the support layer. The invention also relates to structures obtained using such a process. Note that the invention is applicable to thin structures in the form of wafers, of the type used for microelectronics, optical and optronic applications.
In the remainder of this text, the general expression “structure concerned by the invention” will be used to denote a structure like that mentioned above, of the multilayer structure type made from semiconducting or semiconductor materials and comprising an active layer, a support layer and an electrically insulating layer between the active layer and the support layer. The multilayer structures typically combines several layers, some of which are made from different materials.
Thus, one application of the invention is the manufacture of SOI (Silicon On Insulator) type structures. An SOI of this type thus usually comprises:
an active layer made from monocrystalline silicon with a low resistivity (of the order of a few Ohms.cm),
a support layer may be made of silicon with a significantly higher resistivity, typically more than 1000 Ohms.cm,
and an electrically insulating layer between these two layers, for example an SiO2 layer.
The so-called “active” layer is named this way because components will be placed on it, typically electronic or optronic components.
It is desired that the multilayer structures concerned by the invention are associated with the lowest possible electrical losses. Note that in this text, “losses” refers to electrical losses in the structure support layer, the losses originating from polarized operation of the components made on the active layer. These losses are disadvantageous, to the extent that they affect the electrical efficiency of this structure and can generate noise affecting the signal quality in the active layer (particularly for very high frequency applications—in other words for frequencies typically more than 10 GHz).
Thus, structures to which the invention is applicable usually have:
a low electrical resistivity (of the order of 5 to 30 Ω.cm) at their active layer, to enable good interaction of components installed on this layer,
and a much higher resistivity at the layers that support this active layer, to avoid electrical losses in the structure.
To achieve this, the support layer in a structure concerned by the invention (typically, but not necessarily an SOI) will typically have a much higher resistivity than the active layer (for example more than 1000 Ω.cm). The high resistivity of layers supporting the active layer of these structures is thus designed to reduce loses associated with the structure.
Thus, there is a need for structures of the type mentioned at the beginning of this text, in which such electrical losses are as low as possible. And note that in very high frequency applications, electrical signals generated in the active layer of the structure can pass through the insulating layer of the structure despite the electrical insulation effect of this layer. As mentioned above, this corresponds to additional losses that are undesirable. Thus, and even more precisely than as described above, there is a need to make structures like those mentioned above in which losses are minimized for such very high frequency applications. The present invention now satisfies these needs.